Description:
We are seeking a highly skilled Senior Engineer I - Digital Design to join our Ottawa-based team. In this role, you will collaborate with system architecture, analog, firmware/software, and validation teams to design and deliver next-generation, state-of-the-art timing products. You will play a key part in the development of innovative solutions for digital and mixed-signal systems.
Key Responsibilities
- Design and verify digital circuits, including RTL coding, simulation, linting, Clock Domain Crossing (CDC), synthesis, Design for Test (DFT), and Static Timing Analysis (STA)
- Perform system-level modeling and simulation of digital and mixed-signal circuits with embedded firmware
- Develop comprehensive design documentation and actively participate in design and code reviews
- Support FPGA prototyping, silicon validation, and new silicon bring-up activities
- Conduct silicon testing and block-level validation in laboratory environments
Requirements/Qualifications
- Bachelor’s, Master’s, or PhD degree in Electrical or Computer Engineering
- Minimum of 2 years of experience in digital design or a related field
- Strong hands-on experience in RTL design, synthesis, and verification using Verilog, VHDL, or SystemVerilog, as well as Static Timing Analysis (STA)
- Working knowledge of Design for Test (DFT) and layout Automatic Place and Route (APR)
- Experience with FPGA and SoC design, as well as C programming
- Familiarity with laboratory instruments such as oscilloscopes, function generators, and signal/spectrum analyzers
- Proficiency in scripting languages (e.g., Python).
- Excellent verbal and written communication skills
Preferred Qualifications
- Background in fixed-point arithmetic and digital signal processing (DSP)
- Knowledge of low-power design and verification techniques
- Understanding of microprocessor and microcontroller architectures
- Familiarity with timing product specifications and architectures (e.g., clock generators, PLLs)