Analog Design Engineer

Description:

Microchip Technology Inc., a global leader in embedded control solutions with over 17,000 employees worldwide, is seeking a Senior Engineer II - Analog Design for its Timing and Communication Group (TCG) in Ottawa. The company is renowned for developing innovative products that power a wide range of industries. Microchip fosters a culture built on empowerment, trust, diversity, and employee growth through its nationally recognized Leadership Passage Programs and commitment to career development.

As a Senior Analog Design Engineer, you will play a critical role in the design, simulation, and validation of analog integrated circuits (ICs) within mixed-signal System-on-Chip (SoC) products. This position involves developing high-performance analog IP blocks used in timing products such as multi-GHz PLL circuits, high-speed I/O interfaces, MEMS drivers, and digital circuits. The ideal candidate will demonstrate technical expertise, innovation, and strong collaboration skills in a multi-site engineering environment.

Key Responsibilities:

• Collaborate with design leads and system architects to develop advanced analog IP blocks.

• Simulate and analyze analog circuits under varying process corners and operating conditions.

• Create models for analog components to integrate into mixed-signal top-level simulations.

• Conduct block-level validation of silicon devices and perform system-level lab testing.

• Support design documentation, verification, and cross-functional collaboration.

Requirements / Qualifications:

• Master’s degree or PhD in Electrical Engineering.

• Minimum of 5 years of experience in analog and mixed-signal circuit design.

• Strong background in designing high-speed and analog circuits such as ADCs, DACs, PLLs, DLLs, filters, and I/O interfaces.

• Solid understanding of circuit theory, analog layout principles, and mixed-signal design.

• Hands-on experience with Cadence IC design tools and flows.

• Proficiency in scripting and automation using Skill, Python, Perl, or TCL.

• Familiarity with Verilog-A modeling and analog behavioral simulations.

• Excellent teamwork and communication skills, with experience working across multi-site teams.

Additional Details:

• Travel Requirement: Up to 25%

• Compensation Package: Competitive base pay, restricted stock units, quarterly bonuses, comprehensive health coverage (effective day one), retirement plans, and the industry-leading IESPP employee stock purchase program.

• Work Environment: On-site role with a strong emphasis on collaboration and innovation.

• Commitment to Accessibility: Microchip provides full accommodation throughout the hiring process in compliance with Ontario’s human rights and accessibility legislation.